Determining maximum k-width-connectivity on meshes

AbstractLet I be a n × n binary image stored in a n × n mesh of processors with one pixel per processor. Image I is k-width-connected if, informally, between any pair of 1-pixels there exists a path of width k (composed of 1-pixels only). We consider the problem of determining the largest integer k such that I is k-width-connected, and present an optimal O(n) time algorithm for the mesh architecture

Computational thinking in high school courses

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Two-Layer Channel Routing with Vertical Unit-Length Overlap

We show that any n-net 2-terminal channel routing problem of density d can be wired on a two-layer grid of width w = d + 0 (d1J3) when vertical wire segments are allowed to overlap for a dis-tance of length 1. TItis is a considerable asymptotic improvement over the best known, and optimal, channel width of 2d-l for models in which no vertical overlap is allowed [RBM, PL]. OUf result also improves the 3d12 + 0(1) channel width achieved by a recent algorilhm [0] for the same vertical overlap model. The algorithm presented in this paper produces at most 4 over-laps of unit length between any two nets, uses 0 (n) contacts, and can be implemented to run in O(nd2l3) time. We also generalize the algorithm to multi-terminal channel routing problems for which our algorithm uses a width ofw = 2d + 0 (d 2J3)

Multiple Network Embeddings into Hypercubes

In this paper we study the problem of how to efficiently embed r intercon-nection networks Go,...,Gr _ ll r: k, into a k-dimensional hypercube H so that every node of the hypercube is assigned at most T nodes all of which belong to different G;'s. When each G j is a complete binary tree or a leap tree of 2k-1 nodes, we describe an embedding achieving a dilation of 2 and a load of 5 and 6, respectively. For the cases when each G j is a linear array or a 2-dimensional mesh of 2k nodes, we describe embeddings that achieve a dilation of 1 and an optimal load of 2 and 4, respectively. Using these embeddings, we also show that Tl complete binary trees, T2 leap trees, T3 linear arrays, and T 4 meshes can simultaneously be embedded into H with 1 constant dilation and load, L Tj: k. i=l

A Lower Bound on Embedding Tree Machines with Balanced Processor Utilization

In this paper we show that any embedding of a 2m + I-node com-plete binary tree T into an m-node complete binary tree H requires a dilation of at least 3 when every node of H is assigned one interior and one leaf node of T, except one node which is assigned one interior and two leaf nodes of T. aThis work was supported by the Office of Naval Research under Contracts NOOOl4

Planar Linear Arrangements of Outerplanar Graphs

Given an n-vertex outerplanar graph G I we consider the problem of arranging the vertices of G on a line such that no two edges cross and various cost measures are minimized. We present efficient algorithms for generating layouts in which every edge (i,j) of G does not exceed a given bandwidth b (i,n, the total edge length and the cutwidth of the layout is minimized. respec-tively. We present characterizations of oplimallayollts which are used by the algorithms. Our algorithms combine sublayouts by solving two processor scheduling problems. Although these scheduling problems are NP-complete in general. the insrances generated by our algorithms are polynomial in n